4b0f3257dd
* Remove 'col' from linters where it is hardcoded to 1 When 'col' is 1, the first column will get highlighted for no reason. It should be 0 (which is the default). In the scalac linter there was also a check about the outcome of `stridx`. It would set l:col to 0 if it was -1, and then it uses `'col': l:col + 1` to convert the outcome of `stridx` to the actual column number. This will make 'col' equals 1 when there is no match. We can remove the check because `-1 + 1 = 0`. * Remove outdated comments about vcol vcol was added as a default, and the loclists that follow these comments do not contain 'vcol' anymore
43 lines
1.3 KiB
VimL
43 lines
1.3 KiB
VimL
" Author: Masahiro H https://github.com/mshr-h
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" Description: iverilog for verilog files
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function! ale_linters#verilog#iverilog#Handle(buffer, lines) abort
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" Look for lines like the following.
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"
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" tb_me_top.v:37: warning: Instantiating module me_top with dangling input port 1 (rst_n) floating.
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" tb_me_top.v:17: syntax error
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" memory_single_port.v:2: syntax error
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" tb_me_top.v:17: error: Invalid module instantiation
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let l:pattern = '^[^:]\+:\(\d\+\): \(warning\|error\|syntax error\)\(: \(.\+\)\)\?'
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let l:output = []
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for l:line in a:lines
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let l:match = matchlist(l:line, l:pattern)
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if len(l:match) == 0
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continue
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endif
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let l:line = l:match[1] + 0
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let l:type = l:match[2] =~# 'error' ? 'E' : 'W'
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let l:text = l:match[2] ==# 'syntax error' ? 'syntax error' : l:match[4]
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call add(l:output, {
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\ 'bufnr': a:buffer,
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\ 'lnum': l:line,
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\ 'text': l:text,
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\ 'type': l:type,
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\})
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endfor
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return l:output
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endfunction
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call ale#linter#Define('verilog', {
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\ 'name': 'iverilog',
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\ 'output_stream': 'stderr',
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\ 'executable': 'iverilog',
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\ 'command': 'iverilog -t null -Wall %t',
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\ 'callback': 'ale_linters#verilog#iverilog#Handle',
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\})
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